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dc.title | RTMON2 - new version of educational operating system | en |
dc.contributor.author | Dolinay, Jan | |
dc.contributor.author | Vašek, Vladimír | |
dc.contributor.author | Dostálek, Petr | |
dc.relation.ispartof | International Journal of Mathematical Models and Methods in Applied Sciences | |
dc.identifier.issn | 1998-0140 Scopus Sources, Sherpa/RoMEO, JCR | |
dc.date.issued | 2013 | |
utb.relation.volume | 7 | |
utb.relation.issue | 1 | |
dc.citation.spage | 55 | |
dc.citation.epage | 62 | |
dc.type | article | |
dc.language.iso | en | |
dc.publisher | North Atlantic University Union (NAUN) | en |
dc.relation.uri | http://www.naun.org/multimedia/NAUN/ijmmas/16-568.pdf | |
dc.subject | Freescale | en |
dc.subject | HCS08 | en |
dc.subject | Microcontroller | en |
dc.subject | Operating system | en |
dc.subject | RTMON | en |
dc.description.abstract | This article describes improved version of simple educational operating system RTMON, which we developed. This system, named RTMON2, should be used mainly as teaching aid in microcontroller programming lessons, but it can be useful also for other projects such as student's theses. The system offers an easy way to develop applications for 8-bit microcontrollers with several concurrently running tasks. The new version of the system was developed using our experience from teaching lessons with the previous version. RTMON2 improves usability in real-world applications by more efficient usage of RAM memory. The system currently runs on GB60, QE128 and QG4 derivatives of the Freescale HCS08 microcontroller family and also on Atmel AVR ATMega8 microcontroller. | en |
utb.faculty | Faculty of Applied Informatics | |
dc.identifier.uri | http://hdl.handle.net/10563/1003091 | |
utb.identifier.obdid | 43869899 | |
utb.identifier.scopus | 2-s2.0-84872143448 | |
utb.source | j-scopus | |
dc.date.accessioned | 2013-02-02T01:12:48Z | |
dc.date.available | 2013-02-02T01:12:48Z | |
utb.contributor.internalauthor | Dolinay, Jan | |
utb.contributor.internalauthor | Vašek, Vladimír | |
utb.contributor.internalauthor | Dostálek, Petr | |
utb.fulltext.affiliation | Dolinay J., Vašek V. and Dostálek P. Jan Dolinay is with the Department of Automation and Control Engineering, Tomas Bata University in Zlin, Faculty of Applied Informatics,nám. T. G. Masaryka 5555, 76001 Zlín, Czech Republic (e-mail:[email protected]). Vladimír Vašek is with the Department of Automation and Control Engineering, Tomas Bata University in Zlin, Faculty of Applied Informatics, nám. T. G. Masaryka 5555, 76001 Zlín, Czech Republic (e-mail: [email protected]). Petr Dostálek is with the Department of Automation and Control Engineering, Tomas Bata University in Zlin, Faculty of Applied Informatics, nám. T. G. Masaryka 5555, 76001 Zlín, Czech Republic (e-mail: [email protected]). | |
utb.fulltext.dates | - | |
utb.fulltext.sponsorship | This work was supported by the European Regional Development Fund under the project CEBIA-Tech No. CZ.1.05/2.1.00/03.0089). | |
utb.fulltext.projects | CZ.1.05/2.1.00/03.0089 | |
utb.fulltext.faculty | Faculty of Applied Informatics | |
utb.fulltext.ou | Department of Automation and Control Engineering |